PDP-9 Restoration Blog Starting 2019


2/16/19
Moved to the new Lab space.

3/2/19 Hours: 40412.4
We powered up the PDP-9 for the first time in the new lab space. Bit-9 is stuck on in all of the registers so that is the first thing to fix.

3/10/19
We made a longer power cord out of 12-3 SOO cord.
We measured the power consumption at 11A @ 120VAC, so it will $0.30/hour to run the CPU.

We swapped the B131 modules in slots A21 and A23, these are the Adder modules for bits 8 & 9.
The stuck bit moved to bit 8, so we know that the B131 that came out of slot A23 is defective.
We don't have a spare, so we will need to repair it.

3/16/19
The A BUS input on pin S was at -.011V (logic 0) and the other boards were at -3.46 (logic 1).
The SUM output on pin V was at -.3.53V (logic 1) and the other boards were at -0.11 (logic 0).

We measured the input and output voltages on the misbehaving B131 FlipChip, and on the two working neighbors.
Right away we could see that the output voltage was not correct on the broken B131, which explains the stuck bit-9.

The Adder circuitry in the PDP-9 is very fast (for its time), very complicated, and mostly analog.
The internal circuitry has four possible current/voltage levels depending on the state of the four inputs. 

We made a benchtop test setup for the B131 so we could manipulate the input signals and measure the output signals.
Then we compared the behavior of a good B131 to the bad B131.
After a few hours of pondering the schematic to see how it works we were able to devise tests that would show if each of the individual transistors were working correctly.
Eventually we determined that Q4, a 2N3669 transistor was not working at all.
We replaced it with a New Old Stock part, and now the B131 is working again, and the stuck bit-9 is gone.
Alex is making an LT Spice model of this FlipChip so we can better understand how it works.

Click on the image of the B131 Adder for a larger view.

When running at the slowest possible speed the PDP-9 will run two JMP instructions.
Otherwise the behavior is inconsistent, and the Deposit & Examine doesn't always work on the first try.
This sounds like timing issues, so we need to go through the procedures in the System Adjustment manual.

3/17/19
We did some more debugging on Sunday to determine what instructions work and found that the JMP instruction goes to the wrong address.
After some digging we found a stuck bit-17 in the AC register.
We swapped the B213 module on slot C39 that holds that AC register bit, the B169 in slot A38 that gates the output to the A BUS, and the B169 in slot B38 that gates the input, but did not see any changes.
We have spare B213 and B169 modules so this should be an easy fix.

3/23/19
Well, the fix was not so easy.
After several hours of boards swaps and debugging we eventually found a bad B213 FlipChip in slot C39.
This FlipChip provides bits 16 & 17 in the AC register and was the cause of the stuck bit 17.

After this repair the system ran MAINDEC-9A-D1AA-D PDP-9 Basic Memory Checkerboard Test for a few minutes and then halted at location 223.
This is the correct behavior when it detects a memory error.

The DEC-9A-H0AA-D PDP-9 System Adjustment Manual describes a procedure to adjust:

  • Clamp and Slice voltages in the Core Memory
  • MA Setup, Stagger Delay, Strobe Delay, Pause Delay, and the Write Delay timing in the Core Memory
  • Current Start Delay, Start Delay, Width Delay, Loop Delay, Strobe Start Delay, CLR Position Delay, and Current Delay in the Control Memory
  • And check other system timing and pulse width values
We will run through the System Adjustment procedure And then try it again.
We will also run the MAINDEC-9A-D01A-D_Instruction_Test_Part_I_Nov67 and MAINDEC-9A-D02A-D_Instruction_Test_Part_II_Nov67 to make sure that all of the instructions are working.

3/24/19
We fiddled with the system a little before we made all of the adjustments.

We ran MAINDEC-9A-D1AA-D PDP-9 Basic Memory Checkerboard Test for a few minutes and then halted at location 223.
C(AC) = 000000 = Memory Address where the error occurred
Press CONTINUE C(AC) = 200000 = Correct data word
Press CONTINUE C(AC) = 740044 = Incorrect data word
Press CONTINUE C(AC) = 000000 = Pattern control word, should be a 000000 or a 777777

Hopefully if will behave better after we adjust everything.

3/30/19
We decided to run MAINDEC-9A-D01A Instruction Test Part 1 to make sure that the processor is fully functional.
The diagnostic failed immediately at address 000575, which is E83.
After reading through the source code we restarted the diagnostic at 000551 and single stepped the processor.
This test clears the AC and Link, compliments the Link, and rotates the Link bit left through all of the AC bits.
It failed when it tried to rotate the bit from bit-12 to bit-11.
We swapped the B169 modules between slots B22 and B26 and the error moved to bit 9/10.
We put the B169 from slot B26 back in B22 and put a replacement B169 in slot B26.

Instruction Test Part 1 now runs OK. 
In the video below we configured the PDP-9 in Single Instruction mode, locked Continue on, enabled Repeat, and set the repeat speed to the minimum.
This causes the machine to run a few instructions per second so you can watch what it is doing.
The upper register on the right shows the contents of the memory that is being accessed and usually contains the instruction being executed.
The lower display is set to show the AC register, part of the machine being tested.

The PDP-9 running Instruction Test 1 very slowly


We were able to successfully run other diagnostics, but not at full speed.

4/6/19
We spend most of the time wiring new AC outlets for the PDP-9, so only a little debug time.
The core memory seems to be working OK even after we fiddled with the voltage and delay settings.
The core memory still needs the final tuning.

We found that the JMP instruction just goes to the next sequential address instead of to the address in the instruction.
That will be our next debuging project.

We also noticed that one of the G882 FlipChips is missing from the TC02 DECtape controller.
We will need to find a replacement before we can try reading/writing DECtapes.
A very generous Anders Sandahl sent us a G882 from his collection.

4/13/19
We did a lot of studying of the circuitry that makes up the Control Memory, known as microcode on a modern computer.
We determined the correct sequence of events, and made a plan to check the Control Memory sequence and why it wasn't executing Control Word 74 for the JMP instruction.

Click on the image for a larger view.

After a lot of 'scope work we determined that we could actually see the signals go active in the Read Only Program memory and could verify which Control Memory words were being executed.
In the 'scope image above the yellow trace is CM CURRENT signal that cause the contents of the Control Memory to be read.
The green trace is the CM STROBE that latches the data from the Control Memory. The signal going positive and negative is actually a DEC standard pulse.
The purple trace CMP7 signal and the blue trace CMG4 are the address lines for the Control Memory that select the Control Word for the JMP instruction.
Oops, you can see in the third sequence where purple goes up and blue goes down that Control Word 74 is being executed.
So much for the out of sequence Control Memory theory.

The last of the four Control Word sequences in the 'scope image is 10, BGN, where it gates the PC into the MB, and waits for the core memory to fetch the next instruction.
The processor will stop at this point if the Single Instruction switch is turned on, which we did.

Now that we knew that Control Word 74 was being executed we verified that all of the bits in the Control Word were being latched.
We quickly found that the PCI bit that latches the new memory address into the program counter was inactive.
That explains why it would not JMP.
We replaced the B213 Jam Flip-Flop module in slot D21 and now the JMP instruction is working again.

Time to go back to adjusting and tuning the core memory and processor, and then on to connecting and debugging the TC02 DECtape controller.

4/20/19
last week we found that one of the Control Memory Flip-Flop FlipChips was defective and replaced it with a spare.
That fixed the PCI (Program Counter In) Control Memory signal, and the JMP instruction.
Unfortunately it looks like we broke many of the other instructions in the process of fixing the JMP instruction.
Each of the B213 modules Flip-Chips, like the one that we replaced, contains two Flip-Flops.
Replacing the B213 in slot D21 fixed the PCI bit, but now it looks like the other half of the FlipChip is broken, and that is affecting the PCO Control Memory signal.
Having a misbehaving PCO (Program Counter Out) signal would explain why many of the other instructions are misbehaving.
We have a few more untested B213 modules we can try, and then it will be time to fix the pile of broken B213 modules we have.

Click on the image of the B213 for a larger view.

We don't have a FlipChip tester that is capable of testing the B/R/S negative logic modules, so we will need to make a bench test setup.
We have a connector module that will hold the FlipChip, and a 3x voltage power supply that we can use to power it.
All we will need for testing is a signal source for a -3V->GND fast pulse for the strobe, and a logic level for the data input.
We even have NOS 2N3009 and 2N3639 transistor for replacements.

To-Do:
The system was disassembled for shipment and needs to be reassembled. (Started)

Find the two I/O cables to connect the TC59 to the PDP-9.
If we don't have the cables we might be able to use seven cables from a PDP-8 or borrow some from another PDP-9/10/15 collector.
 
There is some unconfirmed information that when this system was in its last days of service they had problems with the ROPE memory for the microcode.
There a rubber sheet that compresses the "E" cores together. We will need to replace it.
We have several spare ROPE memory boards. We have no idea if they are good, or what microcode is programmed.
 
We have a spare 8k core stack if we find problems with the core in the system.
 
We were also told that when someone was trying to fix the system they pulled modules while the power was still on.
That may make it challenging to revive this system.
This system uses some of the same transistor only R series Flip-chips as the PDP-8/S so we have some spares for the modules.
It also uses quite a bit of the faster B series modules. We have just a few spare B modules.
 
The rough plan:
Reform the capacitors in the 709 power supply for the processor and test the power supply. (Done)
Reconnect the I/O cables for the paper tape reader/punch. (Done)
Find and connect the Teletype interface cable. This is actually on the PDP-11/23 that was connected to this system.
Power up the system and see what works. (Done)
There was some discussion that many of the light bulbs in the front panel were burned out.
    (All of the Register, Memory Buffer, and Interrupt lights work.) 
Reform the capacitors in the TU20 power supply and test the power supply. (Done)
Power up the TU20 and see what works. (Done)
The tape drive uses vacuum columns so it may be a significant challenge to get it working. 
Reform the capacitors in the TC59 power supply and test the power supply. (Done)
Connect the TC59 tape controller to the I/O section of the PDP-9 and to the TU20. (Done)
Debug the TC59 and the TU20. (In process)

Wire the DC power to the TC02 DECtape controller and connect the I/O cables between the processor and the TC02.
See if the TC02 responds to any IOT instructions.
Try the TC02 diagnostics.
Install a TU55 in the rack with the TC02 and TU59.
See if the DECtape works.

Once we get a DECtape working we can make an OS DECtape.
If the PDP-9 actually runs the OS, it will be the only one on the planet that can.

The instructions tested so far are:
CLA    Works OK
CLC    Works OK
CLL    Works OK
CLOF   Turns the CLK light off.
CLON   Turns the CLK light on.
CMA    Works OK
CML    Works OK
DAC    Works OK
DZM    Works OK Fixed on 3/23/13
HLT    Works OK Fixed on 3/23/13
IOF    Turns the PIE light off.
ION    Turns the PIE light on.
IZS    Works OK Fixed on 3/16/13
JMP    Works OK Fixed 3/10/13
LAC    Works OK
LAS    Works OK
NOP    Works OK
RAL    Works OK
RAR    Works OK
RTL    Works OK
RTR    Works OK
STL    Works OK

The boards replaced in the PDP-9 processor so far are: 

B131 Adder in slot A23, replaced Q4, 2N3669, 3/17/19
B169 Inverter (Multiplexor) in slot B26 of the processor with a spare
B310 Delay Line in slot EF29 of the processor with a spare, and again with a repaired module 
B213 JAM Flip-Flop in slot H33 of the processor with a spare, 2/2/13
B213 JAM Flip-Flop in slot C39 of the processor with a spare
B213 JAM Flip-Flop in slot C18 of the processor with a spare
B213 JAM Flip-Flop in slot C35 of the processor with a spare, and again with a spare
B213 JAM Flip-Flop in slot D20 of the processor with a spare
B213 JAM Flip-Flop in slot D21 of the processor with a space 4/13/19
B213 JAM Flip-Flop in slot D27 of the processor with a spare
B213 JAM Flip-Flop in slot D28 of the processor with a spare
B213 JAM Flip-Flop in slot H33 of the processor with a spare
B213 JAM Flip-Flop in slot E20 of the I/O controller with a spare
B310 Delay Line in slot EF29 of the processor with a spare 
B360 Adjustable Delay Line in slot D33 of the Core Memory with a spare
G219 Memory Selector in slot AB09 of the Core Memory with a spare 
G219 Memory Selector in slot HJ24 of the Core Memory with a spare 
G920 Repaired, and repaired again.
R111 Diode Gate in slot H23 of the processor with a spare
R123 Diode Gate in slot D15 in the I/O controller.
R401 Clock Flip-Flop module in slot KD09-E03 of the I/O controller with a spare. 
S205 Dual Flip-Flop module in slot KD09-D07 of the I/O controller with a lower drive R205 spare. We need to repair the S205 and put it back in the system.
S603 Triple Pulse Amplifier in slot J23 with a spare. Diode D42 on the original conducted in both directions.

The boards replaced in the TU20 Tape Drive so far are:
 
2N1304 transistor in the EOT circuit on the Photosense Amplifier in the tape transport.
G287 Write Driver in slots A02-A06, replaced 2x 2N3500 transistors for tracks B, 8, 2, and Parity. Some of the diodes on theses modules have small cracks.
R113 Diode Gate in slot B20 with a spare.
R123 Diode Gate in slot B17 has poor drive to pin P. Working OK, but should be checked further. The R123 Diode Gate in slot B17 was actually an R203 flip-flop. It was replaced with the correct spare.
R203 Triple Flip-Flop in slot B27 with a spare.
R205 Dual Flip-Flop in slot B04 with a spare.
R205 Dual Flip-Flop in slot B05 with a spare.
R302 Dual Delay in slot B09 with a spare. Set trimpots to the same values as on the original.
R302 Dual Delay in slot D29 with a spare. Set trimpots to the same values as on the original.
R303 Integrating One-Shot in slot A21, replaced the open Trimpot.
R401 Clock module in slot A15 with a spare
R602 Pulse Amplifier in slot B13 with a spare.
R602 Pulse Amplifier in slot B16 with a spare.
R603 Pulse Amplifier in slot A09 with a spare.
W501 Schmitt Trigger in slot C10 with a spare.
W501 Schmitt Trigger in slot D09 with a spare.

The boards replaced in the TC59 Tape Controller so far are:
 
R602 Pulse Amplifier in slot A21 with a repaired module.
W640 Pulse Amplifier in slot F22, replaced R17, Q8, and Q9.
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