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Pixar Image Computer

The Pixar Image Computer was developed by the graphics division of Lucasfilm in the late 70s because existing graphics hardware did not meet their needs. The  graphics division of Lucasfilm was purchased by Steve Jobs in 1986 and renamed Pixar. The per-seat cost of the system was never lowe enough to sell in high volume so in 1990 the hardware group of Pixar was sold to Vicom Systems. Vicom Systems went bankrupt a year later. Fewer than 300 of these systems were sold.

The Pixar Image Computer uses 48-bit memory for each pixel. The pixels use 12 bits for red, green, and blue, plus 12 bits for transparency (alpha channel). The CHAP is made from four bit-slice processors and four hardware multipliers in a SIMD architecture. It can execute instructions a rate of 40 MIPS. That made it 200 times faster than a DEC VAX-11/780, a popular system at the time. This system supports up to three CHAPs. The CHAPS talk to each other and other peripherals across the 80 MB/sec YAPBUS (Yet Another Pixar Bus), and to picture memory across the 240 MB/sec PBUS ( Processor Access Bus). The SYSBUS connects to the host computer. The standard video output board supports 525-line interlaced  and 1024 x 768 resolutions.

These systems were part of a 3D medical imaging system donated by Georgetown University's Imaging Source and Information Science section. The complete system included a high-resolution scanner for the CT and MRI images and a scanner interface. The video output board was connected to a Megascan UHR-2008 high-resolution display monitor with 2,560 x 2,048 x 8-bit resolution. A Sun SPARCstation was used as the host computer for the Pixar Image Computer.
Two PII-9 Pixar Image Computers in a single cabinet.
Click on the image for a larger view.

A rear view of the PII-9 Pixar Image Computer.
The three cables at the right are YAPBUS data and control.
From right to left the boards are; CHAP, Memory, Memory,
Memory Control, Memory Control, Gray Serializer, and Gray Serializer.
Click on the image for a larger view.

The Pixar CHAP (Channel Processor) board in each system.
The four large chips at the middle left are 10 MHz 16-bit AMD 21116 bit-slice processors.
The four large chips at the middle right are Logic Devices LMU17 16 x 16 parallel multipliers.
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One of two Pixar Memory boards in each system.
This board contains 384 Fujitsu 256K x 4-Bit Fast Page Mode DRAM chips
for a total of 48 MBytes of storage. This was a huge amount of memory at the time.
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One of two Pixar Memory Controller boards in each system.
This board contains 384 Fujitsu MB81461B-12 64K x 4-Bit Multiport Video RAM chips
for a total of 12 MBytes of storage.
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One of two Megascan Technology Gray Serializer boards in each system.
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