Making an Omnibus Peripheral Emulator

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These early PDP-8 systems have pretty front panels that include switches and lights. Many of the PDP-8 systems that are rescued are missing the peripherals, because the processor looks interesting and the peripherals do not. In many cases the processor does not come with the necessary peripheral interface boards, or the peripherals require extensive restoration. In any case, it is common to find the processors, but no peripherals.

I am attempting to use an Emcraft SmartFusion SOM Starter Kit to make an Omnibus Peripheral Emulatortm. I chose the SmartFusion FPGA because it contains a Cortex M3 processor in a hard core. That eliminates the need to invent an interface between the FPGA and a microprocessor. The FPGA has enough I/O to emulate any Omnibus peripheral, including disks and tapes. The Emcraft SOM Kit has 16MB of RAM and 16MB of flash attached to the ARM processor in the FPGA. This is plenty to run an embedded version of Linux.

Earlier, I did a proof of concept using a PDP-8/L and a smaller version of the Emcraft SmatFusion FPGA board to emulate a Posibus attached paper tape reader. The emulated paper tape reader worked just like a real one, but ran 10x faster.

The Plan:

The first project phase was making an interface from the +5.0VDC Open Collector TTL signals that are used on the Omnibus in the PDP-8/e to the +3.3VDC TTL signals that are used in the Actel SmartFusion FPGA. For the Posibus interface I used 74LVC245 ICs to translate the 5V logic levels to 3.3V that the FPGA can handle. Unfortunately these ICs can only sink 24mA on the outputs. The Omnibus wants 100mA Open Collector drivers. After a lot of discussion within the PDP-8 enthusiast community we settled on the AM26S10 ICs. These are 5V parts and have 100mA sink capability, perfect for the Omnibus. Unfortunately the receive signals from these parts are 5V, so we will use a series resistor and a Zener diode to reduce the signals below the 3.6V that the FPGA can handle.

The Emcraft SOM Starter Kit has an Actel SmartFusion A2F500-FG484 FPGA with an ARM CORTEX M3 processor in a hard core, 16 MB RAM and 16 MB of flash memory so that it can run their port of uC Linux. I will create paper tape reader controller logic for the first project and put it in the FPGA. This logic includes the I/O device code and IOT decoding, the paper tape reader flag flip-flop, a signal to drive the skip-bus signal, 8 bits of paper tape data, and a signal to enable the data bus drivers. These functions run at "hardware speed" and do not involve the ARM processor. The rest of the paper tape reader is emulated by the Linux device driver and the Linux application. These functions can be much slower than the hardware.

The PDP-8 6014 RFC (Reader Fetch Character) instruction puts a 6-bit I/O device code on the Posibus and an IOT of 4. This IOT generates an interrupt that is handled by the paper tape reader controller Linux device driver in the ARM. The Linux device driver interacts with the paper tape reader controller logic in the FPGA, and provides a Linux device for the paper tape reader emulator application, and handles the interrupt from the RFC instruction. The paper tape reader emulator application reads a character from the paper tape image file in flash memory, writes the character to the paper tape reader data buffer, sets the reader flag flip-flop, reads another character from the paper tape image file in flash memory, and goes to sleep. When the device driver receives the interrupt from the RCF instruction again, it wakes the application which reads another character from flash and writes it to the paper tape reader device, and goes back to sleep. The double-buffering significantly improves the performance of the emulated reader.

The other IOTs for the paper tape reader will be added, and then the paper tape punch emulation will be added.

The same FPGA logic and Omnibus interface can be used to emulate any Programmed I/O peripheral on the Omnibus. This includes DECtapes, Floppy Disks, Printers, Analog I/O, Punched Card readers, and a boot loader ROM. All it will take is loading circuitry into the FPGA, writing the matching Linux device driver, and writing the device emulator Linux application.

Having a Windows based prog