PDP-9 Restoration Blog Starting 2022

Go to the earlier restoration blog.

1/1/22

When the diag fails by leaving the PIE enabled after an IOF instruction, we see an IO RESTART pulse at the end of the fetch cycle of the IOF instruction, and 2 mS later we see another IO RESTART. We should not see the IO RESTART pulse after the fetch and we should see an IO RESTART pulse 4 mS after the beginning of the IOF instruction. The early IO RESTART pulse could terminate the IOF instruction execution just after the fetch cycle by restarting the Control Memory, so the IOT parts of the IOF instruction are not processed and the PIE is not disabled.

After running the toggle-in PIE test for a few minutes the processor halted with PIE on, so the fault can be reproduced.

We had temporarily replaced the S202 flipflop in I/O slot J07 with an R202 flipflop. The only difference between the S202 and the R202 is that the S202 has stronger pull-down resistors for faster edges, or heavier loads. We had replaced transistors Q3 & Q4 in the S202 with new 2N3639 parts, but it made no difference in the earlier testing, When we put the S202 back in the processor would not run the PIE test at full speed. It ran OK at REPEAT SPEED 5. We put the R202 back in, and the processor ran OK, but halted with the PIE OK.

The other half of the S202 flipchip is the flipflop for CLK REQ. Maybe that part of the S202 is broken? All of the transistors and diodes measure OK when diode-tested with a DVM. We replaced Q1 & Q2 with new 2N3639 parts. We looked at the behavior of the original transistors on the Tektronix transistor curve tracer and saw that one transistor was really non-functional. We replaced the S202 in I/O slot J07 and the processor is back to halting with PIE on. Now we can look at the IO RESTART pulses, and why there are too many of them.

We looked at the signals that are used to create the IO RESTART signal and eventually got to the S202 flipchip in slot J18 that implements the IO 0 and IO 1 flipflops that make the Gray Code counter. We noticed that the signal on pin S did not have a sharp rise time, so maybe it had a weak Q3 transistor. We replaced Q3 & Q4 with 2N3639 parts, and reinstalled the S202 in I/O slot J18. The processor now runs the toggle-in ION/IOF test. The 'scope traces of the behavior of the Gray Code counter look good.

We tried to boot ADSS, but there was no DECtape motion. Instruction Test #2 ran OK for a few minutes and then halted at 05717, E1549. The status register showed that there was a keyboard interrupt pending when there should not be any interrupts. We were fiddling with the VT220 serial console setup at the time, so it is likely that a character was sent to the PDP-9 and caused an interrupt. We had some difficulty with the VT200 setup and finally found that 7-bits, Mark Parity was the correct setting. We restarted the diag, and it ran OK.

We decided to try MAINDEC-9A-D3RB-D TC02 DECtape Random Exerciser to see if the DECtape controller is responding to the IOT instructions correctly. It looks like the DECtape controller and the drives are working OK.

The ADSS paper tape bootloader loads into the very top of the 8k of core at addresses 17637-17777, and then starts executing at 17646. We are not sure why the ADSS bootstrap is not moving drive 0 and booting ADSS. There is a HLT instruction at 17704 if there was an error with a DECtape command. We need to try the ADSS bootstrap again, and pay attention to the halt address and the contents of the AC that is the TC02 Status Register B and contains the error bits. There are also some error lights on the TC02 display panel that we should look at. That will be the project for next week.

1/5/22

It looks like the booting problem was due to operator error. I didn't position the ADSS bootloader paper tape early enough on the reader, so it missed the first few words that get loaded, and made a mess of the bootloader. I repositioned the paper tape so there was a few inches of blank paper tape before the optical reader, and it booted ADSS. It looks like everything is working again.

That was short lived. After running for about 30 minutes it is now printing garbage on the serial console. It is printing 10x Nul characters (000) and a CR-LF instead of "KM9-15 V5A", a CR-LF, an EX-LF (003) instead of a (215), an ET character (004) instead of a "$" (244). We tried the Teletype and got the same results, so the problem is in the PDP-9.

We toggled in a short serial console loopback program. The results were mixed. Most characters work OK, but many double type. Some, like "I" display an "I" and then a tab.

We loaded MAINDEC-9A-D01A-D Instruction Test Part 1. The diag immediately halted at 12017 (around E963), so the processor is broken again.

Examining address 00000 puts 00020 in the AR, so bit 13 is stuck somewhere. Bits 11 & 12 in the AR cannot be loaded from the switches. Looks like this problem was a flaky bit 13 switch. After wiggling it, it seems to work OK. We will continue the debugging on Saturday.

1/7/22

We ran the built-in maintenance tests. The Memory Buffer, Program Counter, Adder Register, and Accumulator are all working OK. We let it run for a while to warm up and see if it will fail. After 90 minutes there no signs of failure.

We booted ADSS V5A from DECtape, and it seems to work OK.

1/12/22

A while ago crew at the LCM+L got UNIX V0 running on their PDP-7, the same model of machine that Thompson & Ritchie originally used to develop UNIX. The PDP-7 at Bell Labs had a DEC/Burroughs single platter disk drive that had 1/2 of the capacity of the RB09 disk for the PDP-9. Their PDP-7 didn't have a disk, so they made a simple I/O device to emulate a disk and wrote a new UNIX driver for it. They were able to login to UNIX using Ken Thompson's userid and password. A very impressive feat.

Since the PDP-9 is a more modern & faster version of the PDP-7 it can also run UNIX V0. We have the same problem of not having a disk, and an additional problem of not having the EAE (Extended Arithmetic Element) option. We have most of the boards needed to add the EAE option. We could adapt the disk emulator that the LCM+L made for their PDP-7 to the I/O bus on the PDP-9.

Another possibility is to write a TC02/TU55 DECtape driver for UNIX V0 and use DECtape for the mass storage. Since DECtape is a block addressable read/write device it could work, but would be slower than than a disk. All we would need is the EAE option and some software.

The PDP-9 restarted ADSS V5A that was left in core, and seems to be running OK. We experimented with FORTRAN IV and DDT. This machine only has 8k of core memory so it only supports the abbreviated versions of FORTRAN IV and Macro. The abbreviated versions use a command syntax that is different than the full sized versions that are in the documentation. We are struggling a little to figure out the syntax or the abbreviated versions.

1/15/22

We demonstrated the machine today. As usual it was a little flaky, but we got it to run OK. The unit select switch for what we usually us a drive 2 was flaky. We had to rotate the drum a few times to get the select to go on. Something to fix next time.

1/26/22

We started reverse engineering the special interface chassis that used to transfer data from a PDP-11/23. The PDP-11/23 had DL11-W GPIO boards to talk to the PDP-9 interface chassis. It will be interesting to find out how they handled the interface between the +5V TTL logic in the PDP-11 with the -3V transistor logic on the PDP-9.

The signals from the PDP-11/23 go to a W500 High Impedance Follower FlipChip, and then to 9x R203 Tripple Flip-Flop FlipChips. So it looks like data can be transferred from the PDP-11/23 to the PDP-9, but not from the PDP-9 to the PDP-11/23.

We had hopes that we could use this interface with a Raspberry Pi to emulate a disk drive. Since it is unidirectional that is not possible. Looks like we will have to invent a 3.3V TTL to PDP-9 negative logic interface

To-Do:

The system was disassembled for shipment and needs to be reassembled. (Done)

Find the four BC09 I/O cables to connect the TC59 to the PDP-9. (Don't have them. Maybe we can get some BC10 cables from the LCM)

If we don't have the cables we might be able to use seven cables from a PDP-8 or borrow some from another PDP-9/10/15 collector.

There is some unconfirmed information that when this system was in its last days of service they had problems with the ROPE memory for the microcode.

There a rubber sheet that compresses the "E" cores together. We will need to replace it.

We have several spare ROPE memory boards. We have no idea if they are good, or what microcode is programmed.

We have two spare 8k core stacks if we find problems with the core in the system. (Didn't, works OK)

We were also told that when someone was trying to fix the system they pulled modules while the power was still on.

That may make it challenging to revive this system.

This system uses some of the same transistor only R series Flip-chips as the PDP-8/S so we have some spares for the modules.

It also uses quite a bit of the faster B series modules. We have just a few spare B modules.

Fix the drive select for Unit 1 not working problem in the TC02 or TU55

Find out why swapping the B141 flip-chips in slots B11 & B13 breaks the paper tape reader

Rewind the coil in the paper tape punch

Fix the second 709 power supply and connected it to the paper tape punch

Fix the second TU55 DECtape drive

Determine why the PIE light doesn't go off when the I/O RESET switch is pressed. (Fixed 12/7/19)

Collect enough flipchips so we can add the EAE feature for SpaceWar!

Collect the remaining flipchips so we can add the 34H graphics option, also for Spacewar!

The rough plan:

Reform the capacitors in the 709 power supply for the processor and test the power supply. (Done)

Reconnect the I/O cables for the paper tape reader/punch. (Done)

Find and connect the Teletype interface cable. This is actually on the PDP-11/23 that was connected to this system.

Power up the system and see what works. (Done)

There was some discussion that many of the light bulbs in the front panel were burned out.

(All of the Register, Memory Buffer, and Interrupt lights work.)

Reform the capacitors in the TU20 power supply and test the power supply. (Done)

Power up the TU20 and see what works. (Done)

The tape drive uses vacuum columns so it may be a significant challenge to get it working.

Reform the capacitors in the TC59 power supply and test the power supply. (Done)

Connect the TC59 tape controller to the I/O section of the PDP-9 and to the TU20. (Done using borrowed PDP-8 I/O cables)

Debug the TC59 and the TU20. (In process)

Wire the DC power to the TC02 DECtape controller and connect the I/O cables between the processor and the TC02.

See if the TC02 responds to any IOT instructions.

Try the TC02 diagnostics.

Install a TU55 in the rack with the TC02 and TU59.

See if the DECtape works.

Once we get a DECtape working we can make an OS DECtape.

If the PDP-9 actually runs the OS, it will be the only one on the planet that can.

Maindec Diagnostics

MAINDEC-9A-D0BA-D ISZ Test, 5/18/19 failed on 7/26/21

MAINDEC-9A-D0CA Memory Address Test, 7/26/21

MAINDEC-9A-D0DB-D JMP Self Test, 7/26/21

MAINDEC-9A-D0EA-D JMP-Y Interrupt Test, 7/26/21

MAINDEC-9A-D0FA-D JMS-Y Interrupt Test, 7/26/21

MAINDEC-9A-D01A-D Instruction Test Part 1, 11/12/21

MAINDEC-9A-D02A-D Instruction Test Part 2, 1/1/22

MAINDEC-9A-D1AA-D PDP-9 Basic Memory Checkerboard Test, 7/31/21

MAINDEC-9A-D1BA-D PDP-9 Extended Memory Checkerboard Test, 7/31/21

MAINDEC-9A-D1FA-D PDP-9 Extended Memory Address Test, 7/31/21

MAINDEC-9A-D2BA-D PDP-9 TTY Test, 7/26/21

MAINDEC-9A-D3BB-D TC02 Basic Exerciser, 1/1/22

MAINDEC-9A-D3RB-D TC02 DECtape Random Exerciser, 12/14/19

MAINDEC-9A-D7AD-D PDP-9 Basic Exerciser (no punch or tape reader), 5/18/19


The boards replaced in the PDP-9 processor so far are:

B131 Adder in slot A23 of the processor, replaced Q4, 2N3669, 3/17/19

B131 Adder in slot A21 of the processor, replaced Q1, Fairchild 2N3009, 7/24/21

B169 Inverter (Multiplexor) in slot B26 of the processor with a spare, 3/30/19

B169 Inverter (Multiplexor) in slot B31 of the processor with a spare, 12/8/20

B310 Delay Line in slot EF29 of the processor with a spare, and again with a repaired module

B213 JAM Flip-Flop in slot H33 of the processor with a spare, 2/2/13

B213 JAM Flip-Flop in slot C39 of the processor with a spare, 3/23/19

B213 JAM Flip-Flop in slot C18 of the processor with a spare

B213 JAM Flip-Flop in slot C35 of the processor with a spare, and again with a spare

B213 JAM Flip-Flop in slot D20 of the processor with a spare

B213 JAM Flip-Flop in slot D21 of the processor with a spare 4/13/19

B213 JAM Flip-Flop in slot D27 of the processor with a spare

B213 JAM Flip-Flop in slot D28 of the processor with a spare

B213 JAM Flip-Flop in slot H33 of the processor with a spare

B213 JAM Flip-Flop in slot E20 of the I/O controller with a spare

B310 Delay Line in slot EF29 of the processor with a spare

B310 Delay Line in slot EF36 of the Core Memory with a spare, put the original repaired board back 8/10/19

B360 Adjustable Delay Line in slot D33 of the Core Memory with a spare

G009 Sense Amplifier in slot C25 of the Core Memory with a spare

G219 Memory Selector in slot AB09 of the Core Memory with a spare

G219 Memory Selector in slot HJ24 of the Core Memory with a spare

G920 Repaired, and repaired again. 05/18/19 Replaced a diode with a 1N4149 for Microword 74

R111 Diode Gate in slot H23 of the processor with a spare

R123 Diode Gate in slot D15 in the I/O controller

R401 Clock Flip-Flop module in slot KD09-E03 of the I/O controller with a spare

S202 Dual Flip-Flop module in slot J07 of the I/O controller, Replaced Q1-Q4 with new 2N3639 transistors

S202 Dual Flip-Flop module in slot J18 of the I/O controller, Replaced Q3 & Q4 with new 2N3639 transistors

S205 Dual Flip-Flop module in slot D07 of the I/O controller with a lower drive R205 spare. We need to repair the S205 and put it back in the system

S603 Triple Pulse Amplifier in slot J23 with a spare. Diode D42 on the original conducted in both directions

S603 Triple Pulse Amplifier in slot J10 with a spare

W040 Solenoid Driver in slot B33 of the processor, 2/1/20 replaced D2 & D7 with new 1N3606 diodes


The boards replaced in the TU20 Tape Drive so far are:

2N1304 transistor in the EOT circuit on the Photosense Amplifier in the tape transport

G287 Write Driver in slots A02-A06, replaced 2x 2N3500 transistors for tracks B, 8, 2, and Parity. Some of the diodes on theses modules have small cracks

R113 Diode Gate in slot B20 with a spare

R123 Diode Gate in slot B17 has poor drive to pin P. Working OK, but should be checked further. The R123 Diode Gate in slot B17 was actually an R203 flip-flop. It was replaced with the correct spare

R203 Triple Flip-Flop in slot B27 with a spare

R205 Dual Flip-Flop in slot B04 with a spare

R205 Dual Flip-Flop in slot B05 with a spare

R302 Dual Delay in slot B09 with a spare. Set trimpots to the same values as on the original

R302 Dual Delay in slot D29 with a spare. Set trimpots to the same values as on the original

R303 Integrating One-Shot in slot A21, replaced the open Trimpot

R401 Clock module in slot A15 with a spare

R602 Pulse Amplifier in slot B13 with a spare

R602 Pulse Amplifier in slot B16 with a spare

R603 Pulse Amplifier in slot A09 with a spare

W501 Schmitt Trigger in slot C10 with a spare

W501 Schmitt Trigger in slot D09 with a spare


The boards replaced in the TC59 Magnetic Tape Controller so far are:

R602 Pulse Amplifier in slot A21 with a repaired module

W640 Pulse Amplifier in slot F22, replaced R17, Q8, and Q9


The boards replaced in the TC02 DECtape Tape Controller so far are:

G882 Reader/Writer in C23 with a donation from Anders, 4/20/19

R201 Flip-Flop in slot C02 with a spare, 8/10/19

S107 Inverter in slot C18 with a spare, 7/7/19

S107 Inverter in slot F18 replaced Q5, 7/21/19

S123 Diode Gate in slot F14 replaced Q3, 9/20/19

S202 Dual flip-flop from slot A5 needs repair, 8/10/19

S205 Dual flip-flop from slot B8 replaced D21 on 12/14/19

S603 Pulse Amplifier in slot C17, replaced D20 8/10/19