PDP-9 Restoration Blog Starting 2021

Go to the earlier restoration blog.

3/6/21

We tried to demonstrate ADSS last week, but it would not boot. After testing with toggled in instructions we found that all of the instructions that we tried worked OK, except for the JMP instruction.

We connected 'scope and the logic analyzer to the microcode address to see if we could see it execute the microcode steps. We were thinking that it was not getting to the microword for the JMP instruction. After lots of fiddling we were never able to get the logic analyzer to decode the negative logic levels and display the correspond logic states. After many hours of fiddling we demonstrated what was wrong to one of our volunteers, and of course it worked. After several tried it booted ADSS. Something is marginal, and we will need to find out what it is to make the machine more reliable. A project for next week.

3/13/21

The PDP-9 booted OK and ran fine for a few hours, but then the TU-55 DECtape drive in the CPU cabinet stopped working. The right hub motor had no torque in any state. I swapped the G850 SCR flipchip for the right motor with one we borrowed from the PDP-8/I and the drive works OK. We will either find a replacement or fix the one we have.

6/26/21

We ran an ADSS demonstration and left the system powered up in case other visitors wanted to see it in operation. After a few hours of power on the DECtapes would not work. Time for some diags to see what is broken.

7/2/21

MAINDEC-9A-D01A-D Instruction Test Part 1 failed at address 25. SKP not working? I toggled in a little program to test the SKP instruction and it works OK. Not loading the paper tape correctly? I loaded MAINDEC-9A-D1AA-D PDP-9 Basic Memory Checkerboard Test and it runs, but the lights don't look right and it doesn't beep periodically. I toggled in a little program to copy the switches to the Status A register in the TC02, and can make it move the tape in both directions. At least much of the CPU, I/O, and TC02 are working.

7/17/21

We ran the built-in diagnostics and noticed that the Memory Buffer display shows bits 8-17 counting, bit 7 is off, and bits 6-0 on. This pattern is reflected in all of the other registers. In step one this diagnostic gates the Adder Register onto the O-bus, turns on the +1 signal to increment the Adder Register, and gates the O-bus into the Memory Buffer register. In step two it gates the Memory Buffer onto the O-bus and gates the O-Bus into the Accumulator, Adder, Program Counter, and MQ Registers, and also gates the console switches onto the O-bus. Turning on the 7 Address switch on the console turns on that bit on all registers except the Memory Buffer register. It looks like the problem is in the Adder or the Memory Buffer. Since we have seen failures in the B213 JAM Flip-Flops before we will look there first.

We swapped the B213 Jam Flip-Flops in slots B16 and B20 that implement Memory Buffer bits 6, 7, 8, and 9. It didn't change the behavior.

We swapped the B169 Inverters in slots B17 and B21 that multiplex lots of inputs to the adder bits 6, 7, 8, and 9. It didn't change the behavior.

We swapped the B131 Adders in slots A17 and A19 that implements bits 6 and 7. The broken bit moved from bit 7 to bit 6, so the broken flipchip is now in slot A17.

We swapped the B131 Adder in slots A19 and A21 that implements bits 7 and 8. The broken bit moved from bit 7 to bit 8, so the broken flipchip is now in slot A21.

So now we know which B131 is broken, the one originally in slot A19. We checked all of the diodes and transistors on the B131 with the diode voltage drop function in a DVM, and they all looked OK. After we put the board back in the PDP-9 it worked OK. Oh well, just a bad connection.

We tried to boot ADSS, but no luck. We tried the run the Instruction Test #1, but it looked like it didn't load correctly. Maybe we need to investigate the paper tape reader and controller?

7/21/21

We tried to run the ISZ test MAINDEC-9A-D0BA. It printed garbage on the console. We single stepped the program and found that the operate instruction CLA!CLL!CMA set the AC to 775777, so bit-7 in the adder is still broken.

We entered a little program to clear and compliment the AC. It showed that bit-7 was always off.

We moved the B131 from slot A19 to slot A21 and the problem moved to bit-8.

So, the B131 that is in slot A21 is broken again. We need to fix that next.

7/23/21

We replaced Q1, a Fairchild 2n3009, with a real DEC2009B transistor on the B131 that was in slot A21.

7/24/21

The system will now run MAINDEC-9-D01A Instruction Test #1, so that is promising. We will run the rest of the processor and memory tests to make sure that everything is OK. Then we can start on the TC02 DECtape tests.

It would not boot ADSS from DECtape. There was no motion on the tapes, and it halted. We will need to find the source listing of the TC02 DECtape bootstrap to see why it halted.

7/27/21

MAINDEC-9A-D01A Instruction Test Part 1 still runs OK, so that is a good sign.

MAINDEC-9A-D02A-D Instruction Test Part 2 runs OK.

MAINDEC-9A-D2BA-D PDP-9 TTY Test runs OK.

MAINDEC-9A-D0BA-D ISZ Test halted with the message ISZ DID NOT SKIP, LOC 017400

MAINDEC-9A-D0CA Memory Address Test runs OK.

MAINDEC-9A-D0DB-D JMP Self Test runs OK.

MAINDEC-9A-D0EA-D JMP-Y Interrupt Test runs OK.

MAINDEC-9A-D0FA-D JMS-Y Interrupt Test runs OK.

MAINDEC-9A-D1AA-D PDP-9 Basic Memory Checkerboard Test

Halted at 000223. AC = 013414, should be = 000000, was = 002000. I set switch 7 on to ignore the failed bit, and it halted again with a bit 9 failure. I set switch 9 on and it runs OK.

Halted at 000223. AC = 017525, should be = 000000, was = 002000.

Halted at 000223. AC = 017515, should be = 000000, was = 002000.

Halted at 000223. AC = 017515, should be = 000000, was = 002000.

We need to look at the B169, G219, G009, and W612 modules that are associated with bit-7.

7/31/21

We ran MAINDEC-9A-D1AA-D PDP-9 Basic Memory Checkerboard Test. After a few seconds it halted at 000223, the normal error location. The AC contained 013515, the address of the memory problem. After we pressed Continue the AC contained 000000. This is what the memory location should contain. After we pressed Continue the AC contained 002000, what the memory location actually contained. This is the same bit-7 problem that we observed last week. Pressing Continue twice restarted the diagnostic and the same error halt occurred within a few seconds. We raised the 7 switch to ignore bit-7 errors, and the diagnostic ran continuously.

There are several FlipChips that could cause problems with bit-7. The B169 Mux FlipChip in slot C31 and the G009 Sense Amplifier in slot B25 can be ignored. If one of these failed all of the memory locations would have a bit-7 error.

That leaves the G219 Memory Selector FlipChips in slots AB09 and EF09 for the bit-7 Digit Drive circuit, and the G219 FlipChips in slots HJ23-HJ30 for the Word Select circuit. We can look at the failing address to narrow down which G219 in the Word Select circuit could be the problem. Of course the system is running this diagnostic without errors now, so maybe we need to try it again when it is cold.

MAINDEC-9A-D1BA-D PDP-9 Extended Memory Checkerboard Test runs OK.

8/4/21

ADSS V5 booted after several tries. Most of the time it got an IOPS4 error. This error for a DECtape means Unit Not Ready. It may be that the TC02 DECtape controller and handler software was retrying a read and got a timeout. We need to format some DECtapes on the PDP-9 and run the DECtape diagnostics. Hopefully we can find some adjustments that will improve the DECtape behavior.

8/15/21

We tried to demonstrate the system to some visitors, but its broken again.

8/18/21

MAINDEC-9A-D01A Instruction Test Part 1 runs OK

MAINDEC-9A-D02A-D Instruction Test Part 2 runs OK

MAINDEC-9A-D1BA-D PDP-9 Extended Memory Checkerboard Test runs OK

MAINDEC-9A-D3BB-D TC02 Basic Exerciser

  1. Search Scope Loop, works OK

  2. Read Scope Loop, works OK

  3. Write Data Scope Loop, skipped

  4. Search Find All Blocks, works OK but had to configure the tapes as PDP-7 format. The upper drive in the I/O cabinet needs adjusting.

  5. Read/Write Data Test, skipped

  6. Parity Generation and Checking Test, skipped

  7. Basic Search Routine, runs OK

  8. Start/Stop/Turnaround Test, runs OK

  9. TC02 Instruction Test, skipped

After a few failed attempts it booted ADSS V5A, loaded and ran the "Hello World" program. Something is a little flaky, so it needs more testing.

12/4/21

The system would not boot ADSS from DECtape when we tried to demonstrate it. The Processor is running, but does not move the DECtapes. The built-in maintenance program run normally for all registers.

12/11/21

We loaded MAINDEC-9A-D01A INSTRUCTION TEST PART 1. This diagnostic only takes 5 mS per pass, so it tests the Operate, LAC, AND, XOR, TAD, ADD, and SAD instructions 200x per second. The processor did not halt, so this is running OK.

We loaded MAINDEC-9A-D02A INSTRUCTION TEST PART 2. This diagnostic only takes 5 mS per pass, so it tests the DZM, DAC, ISZ, JMP, JMS, TIME CLOCK, DBR instructions, and the interrupts 200x per second.

The processor immediately halted at 05762, error E1551. This part of the diagnostic starts at address 05745. It loads the AC with 05762 (the location of the HALT at the end of this section) and stores it at location 00001 (the interrupt vector), stores zero at location 00000 (the return address), loads the AC with 17777 and stores it at location 00007. Then it turns interrupts off, turns on the real time clock, waits for the clock flag to turn on (which should generate an interrupt), turns the interrupts on and immediately off. If the interrupt is not generated it will skip over the next instruction, a HALT. It halts, so it handled an interrupt.

I am a little surprised that you can have a pending interrupt, turn interrupts on, immediately turn interrupts off, and not have an interrupt occur. Another interesting thing about the PDP-9 is that the interrupt circuitry is in the I/O controller, not in the processor.

I single stepped this code. The ION instruction at 05757 turned the interrupts and the PIE light on, but the next instruction, an IOF, did not turn the interrupts and the PIE light off. So, it looks like the ION instruction is working, but the IOF instruction is not. Next weekend we will see if the IOF instruction us being decoded and just the Interrupt Enable flip-flop is not.

After toggling in some test code I found that the ION instruction enables interrupts, but the IOF instruction does not disable interrupts. It looks like the S202 Flip-Flop in slot J07, or the B213 JAM Flip-Flop in slot F15 has failed. We have replaced and repaired a bunch of B213s, so that will be the first to try this week.

12/15/21

We swapped the S202 FlipChip in slot J07 with a spare R202 just for a test. The code that enables and disables the interrupts now works.<