PDP-8/L restoration blog.

Making a Posibus Peripheral Emulator

The PDP-8/L is a less expensive and much smaller version of the PDP-8/I. The PDP-8/I cost $12,000 and the PDP-8/L cost $8,000. Both were available from 1968 through 1971. The PDP-8/I backplane is wired for many common peripheral controllers and for 8K of core memory. The smaller PDP-8/L chassis only contains room for 4K of core, a paper tape reader (PR8/L) and punch (PP8/L) controller, data break facility, and the Teletype interface. The internal data break facility could only be used with a single controller for peripherals like a disk or tape. An expansion chassis (BA08) was available that provided an additional 4K of core (MC8/L). Controller boards for a Card Reader, Multiple Teletype, Storage Tube Display, Real-Time Clock, Oscilloscope Display, and Incremental Plotter could be added to the BA08 chassis. Additional peripherals like disk and tape drives could be connected to the system with Posibus cables.

As of 1/2/12 this system is running!

A total of 22 modules of the 100+ modules needed to be replaced.

Now we need to hunt for some peripherals.

By popular demand...

We left the original patina and cartoon on the front panel of the PDP-8/L. The toggle switch was replaced with a key switch when we replaced the power supply. The examine plastic toggle replaced was replaced with one donated by Ulrich N Fierz.

We took a look at the Positive I/O Bus signals on the 8/L so we could verify our understanding of how the I/I bus works.

This is the bottom view of the system. It is built upside-down from what is the current convention of having the boards plug in from the top.

The missing boards at the middle are for optional memory parity checking.

The missing boards in the top row toward the rear are for an optional high-speed paper tape reader/punch.

The missing boards in the top row at the rear and bottom row front are for the optional Data-Break (DMA) and Power-Fail restart features.

The cable at the bottom left goes to the Teletype.

Posibus I/O cables can be installed in the back rows to connect to and expansion chassis or peripherals.

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This is a logic analyzer image of the TS1, IOP1, IOP2, and IOP3 signals.

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This is the IOP1 pulse that is sent to the peripherals.

The IOP signals need 100 Ohm resistors to ground at the end of the Positive I/O bus.

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This is the Wire-Wrap backplane in the PDP-8/L.

The orange wires are original.

Any other color was added later as a correction or addition.

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This is the MB08(1) signal that is sent to the peripherals.

The documentation implies that this should only be a 3.0V signal.

These signals settle several hundred nanoseconds before the IOTs are present so the ringing will not cause a problem.

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This is Warren's USB Logic Analyzer connected to th