Embedded Files
8/16/21
The system is in overall good condition. It does not have the original IMSAI backplane installed, and has a second power supply behind the backplane. A wire harness connected to the second power supply looks like it is for an external 8" diskette drive.
8/18/21
We removed all of the boards from the system, reformed the capacitors in the power supplies, and then plugged it in to see if the power supplies would provide a reasonable voltage. The outputs were about +10V, and +/-18V. That should be OK. The console had some LEDs lit, and would respond to key presses.
We installed the Cromemco ZPU and tried the console switches. The LEDs were flickering when the system was powered on, so it looks like there is some life in the CPU. It also looks like some of the Address/Data switches affect the address lines when they should not. We will need to do some debugging on the console and CPU.
We tried unsuccessfully to deposit and examine memory. We should try the RAM boards in one of the Altairs to see if they work, and try some of the other S-100 RAM boards that have.
9/4/21
We reseated all of the ICs on the CPU board. It changed the behavior, but not to the correct behavior.
On the front panel:
If you hold RESET, all ADDRESS LEDs are on, DATA bits 0, 1, 6, and 7 are on, WO\ is on.
With the CPU cable disconnected and RESET held, all ADDRESS and DATA LEDs are on.
With the CPU cable rotated 180 degrees and RESET held, all ADDRESS and DATA bits 0, 1, 6, and 7 are on.
With the CPU cable rotated 180 degrees and EXAMINE or EXAMINE NEXT pressed none of the DATA LEDs are on.
ICs 13, 14, 26, & 27 on the CPU board drive the J1 connector. We removed the 4x 74367 ICs, cleaned the black oxide on the leads, and reinstalled them. Now the DATA LEDs look like they are working correctly. This likely means that we need to remove an clean all of the ICs on the CPU board and put some DeOxit on the contacts in the sockets.
We found an STL file for the front panel paddles on Thingverse. The plan is to move the three blue switches from EXAMINE, RESET, and SINGLE STEP to ADDRESS/DATA 7, 6, and 5, and them put the printed handles in the EXAMINE, RESET, and SINGLE STEP locations. We printed two front panel paddles on two different 3D printers. Both handles had problems with the pivot that fits into the metal bracket on the front panel, and the part of the paddle that fits over the stub on the switch. We will look for three molded front panel paddles. Red ones are available from IMSAI, but no blue ones.
9/8/21
We cleaned the leads on all of the socketed ICs on the Cromemco ZPU board. Most of the ICs were silver plated TI parts from 1977. See the image below for the black chip leads.
We found that pin 1 of the SN7474 IC30 was missing. We have not studied the schematic enough to understand what that chip does. We replaced it with a new SN7474. During cleaning pin 6 of the SN7474 IC19 fell off. We replaced it with a new SN7474. We cleaned ICs 17-43. We will do the rest next Saturday.
9/11/21
We continued cleaning the chip leads. We need to do ICs 3-16.
We noticed that there are a mix of sockets on the ZPU board. The low profile TI sockets contact the ends of the leads, and the taller TI sockets contact the sides of the leads. We only cleaned the sides of the IC pins, so we will need to clean the ends of the IC leads for all the low profile sockets.
After cleaning all of the IC leads and reinstalling the ZPU board the front panel us unresponsive. The RUN LED is on and will not go off after a STOP or RESET switch press. Data bits 0, 1, 6, & 7 stay on during RESET. IC26 on the ZPU drives those signals. We swapped ICs 27 & 27, but there was no change in the behavior. We swapped ICs 13 & 39, but there was no change in the behavior.
We removed all of the 74367 buffer ICs and all of the data LEDs are off. We put ICs 14 & 27 in, and all of the data LEDs are off. We put ICs 13 & 26 in, and all of the data LEDs are off. We put ICs 12 & 25 in, and all of the data LEDs are off. We put ICs 24 & 37 in, and all of the data LEDs are off. We put ICs 36 & 41 in, and all of the data LEDs are on, but LEDs 2-5 go off during a RESET. We took IC41 out and there was no change. We took IC36 out and all of the data LEDs are off. We put ICs 36 & 41 in, and all of the data LEDs are on, but lets 2-5 go off during a RESET. We put ICs 40 & 41 in, and all of the data LEDs are on, but lets 2-5 go off during a RESET. We took ICs 40 & 41 out. We put ICs 11 & 23 in, and all of the data LEDs are on, but all LEDs go off during a RESET. The RUN/STOP buttons actually work! We put IC 40 in, and all of the data LEDs are on, but LEDs 2-5 go off during a RESET. We took IC40 out. We put IC41 in, and all of the data LEDs are on, but all LEDs go off during a RESET.
At this point ICs 36 & 40 are the only ones left out. ICs 36 & 40 drive state signals. We reinstalled IC36, and all of the data LEDs are on, but LEDs 2-5 go off during a RESET. We removed IC36. We reinstalled IC40, and all of the data LEDs are on, but LEDs 2-5 go off during a RESET. We reinstalled ICs 36 & 40 and will do some more debugging, maybe on the front panel.
9/15/21
We disassembled the front panel to clean and repair it. We were surprised to see that the nomenclature for the front panel was a sheet of photographic film. Clever design!
We moved the three blue paddles from the right section of the front panel to the middle section where the paddles were missing. We installed one of our yellow 3D printed paddles to replace the now missing blue paddles. The PLA plastic is a little softer than the molded plastic so the switch actuation feels a little squishy. We ordered three replacement NKK P/N M2018TYW01-HA switches from Digikey. These have black paddles, but are otherwise the same.
We removed the front panel from the backplane, cleaned the gold fingers a little, and reinstalled the front panel. We can EXAMINE and DEPOSIT memory now!
We toggled in two little programs from the IMSAI manual. These programs read the PROGRAMMED INPUT switches on the front panel and write that pattern to the PROGRAMMED OUTPUT LEDs on the front panel. It actually works!
We decided to look at the PIO 4 board because it has LEDs on output port #0 so it should be easy to debug. We looked at the jumpering and it looks like the board's base address is 0x2C. Executing an OUT instruction with an address of 0x2c does nothing to the LEDs. Studying the really blurry schematic, the PCB, and tracing signals with the 'scope revealed that the I/O address is 0xE0. Writing to port 0xE0 does change the state of the LEDs.
9/18/21
We went shopping in our warehouse for parts to build out the IMSAI. We found a Cromemco rack mounted system that was partially disassembled and not in very good condition, so we removed the boards and 5 1/4" diskette drives. We also picked a JMR dual-8" diskette drive chassis. and a Lobo dual-8" diskette drive chassis.
We removed the two IMS Associates 4k and installed a Memory Merchants 64k static RAM board. We did a examine-deposit-examine sequence and found that 60k of RAM works OK.
One of the boards we got from the Cromemco system was am 8k ByteSaver with a single EPROM installed. The EPROM has a label that says ZM1.4 (E000), so it contains the Cromemco Z80 Monitor. The 8k ByteSaver is jumpered for a base address of E000. We need to change the configuration of the RAM board so that only 56k is enabled to leave room for the Cromemco Monitor EPROM. We should be able configure the CPU to start at address 0xE000 on power on and run the monitor. Unfortunately the ByteSaver isn't working, so that will be another repair project. Another possibility would be to copy the monitor from the 2708 EPROM to a 2716 EPROM and plug it into one of the sockets of the RAM board. The Cromemco monitor also needs a a TU-ART parallel/serial board for the serial console, which we just happen to have. We will have to decide if we want to use all of the Cromemco boards, or find a different monitor that will will work with the IMSAI serial and parallel boards.
We ordered some replacement front panel switch/paddle assemblies from Digikey. We will use the handles to replace the blue handles that we moved to the address positions.
9/22/21
We are working on the Cromemco 8k Bytesaver today so we can run the Cromemco Z-80 Monitor from an EPROM. We started cleaning the corroded legs on the ICs. The sockets are low-profile from TI, so they touch the edges of the IC leads, not the sides. When we touched IC 2, an SN7474 a lead fell off. So did IC 4, an SN7406. And IC 8, and SN7442.
We bought some NKK switches from Digi-key that the same shape paddle as the IMSAI, but they were unfortunately only available in black. The paddles fit nicely, and are less squishy than the ones that we 3D printed.
9/25/21
I brought some SN7442 ICs from home so we can continue working on the 8k Bytesaver. We replaced the SN7406, SN7442, and SN7474 chips, and cleaned the leads on the remaining ICs.
We disabled the upper 16k of RAM on the 64k RAM board to leave room for the Cromemco Z80 Monitor @ E000 and the Cromemco 16FDC diskette controller @ C000 - D000.
We can't see any data from the 2708 EPROM in socket 0 on the 8k Bytesaver. We followed the address decoding to the Chip Select signal for the 2708 and all is OK. Transistor Q11, a 2N3904, went up in smoke. We didn't have a direct replacement, but since it is just used as a switch just about NPN transistor should work. We installed a NTE287 NPN general purpose transistor as a replacement.
The select signal from IC8 SN7442 goes low when address bits 10. 11. & 12 match. With those addresses all 1s, pin 1 goes low to select EEPROM 7. This signal drives IC 4 pin 3 low to enable programming, and IC3 pin 11 low to enable the CS\ signal.
Installing either of the Cromemco 16FDC diskette controllers that we have stops EXAMINE and DEPOSIT on the front panel from working.
9/30/21
There are many different versions of S-100 bus as the computers evolved. Pins 20 and 70 were redesignated from UNPROTECT and PROTECT that could stop boards from writing to RAM. The IMSAI front panel grounds pin 70, the PROTECT signal, so that is not a problem. The front panel uses pin 20, the UNPROTECT signal, to prevent the front panel from changing RAM. Unfortunately it looks like pin 20 on the Cromemco 16FDC is connected to ground, as defined in the newer versions of the S-100 bus standard, and it stops EXAMINE and DEPOSIT from working. We will put some Mylar tape over the gold fingers on the front panel for pins 20 and 70.
10/2/21
We got a hint from an S-100 expert that pins 20 and 70 were redesignated to be grounds in later boards. We put Kapton tape over the 20/70 fingers on the 16FDC and now EXAMINE and DEPOSIT work again.
We should see the RDOS EPROM on the 16FDC at address 0xC000, but the memory there is all zeros. It looks like address 0xC000 is being decoded and enabling IC25 the RDOS EPROM. IC 49, a 74LS373, may not be being enabled Pin 11 for the G(C) signal is always low. Pin 1 for the E(OC/) signal is high but goes low for an EXAMINE. We need pin 11 high to enable the data to the S-100 bus. IC46 pin 9 is high so pin 8 is low and disables IC49. This is the PWR/ signal on pin 77 of the S-100 bus. I thought that PWR/ would be driven by the CPU board, but it is an input there. We need to determine who should drive this signal.
For next time:
Fix the Bytesaver or program the Cromemco Monitor into a 2716
Find out what we need to boot from a Cromemco Floppy Diskette controller
Make some ribbon cables to go from the card edge connector on the TU-ART to a DB25 connector
8/13/22
We received NOS replacement switches in the right colors from Bob R.
2/11/23
We replaced the broken red switch with a real NOS IMSAI switch. We left the black switches in the right positions. We have some NOS IMSAI blue switches, so we could replace the black ones.
One of the Cromemco Z-80 ZPU boards works, one doesn't. Of course we left the working ZPU in the system. We were able to toggle in some small programs and execute them.
The Memory Merchants 64k SRAM board works. The upper 4k has been deactivated to make room for the monitor or boot ROM.
We installed the Cromemco TUART board. We don't know if it works. Testing that will be one of the next projects
We need to determine why we can't see the RDOS EPROM on the Cromemco 16FDC boards.
The Cromemco Bytesaver board is broken. We need to finish repairing it.
We need to put some Mylar tape on pins 20 and 70 of newer S-100 boards because those pins were re-designated to be grounds in new boards and will cause older boards and the front panel to misbehave.
We plan to use an external 2x 8" floppy drive chassis with this system, so we don't need the additional power supply that was added in the chassis. We will probably remove it and save it for a future project.
2/18/22
After making a posting about our efforts on the VCF S-100 forum we were given a path to try. The 16FDC included a serial port so we don't need the TUART for now. The RDOS EPROM on the 16FDC is at addresses 0xC000 through 0xCFFF. We need to make sure that this block of 4k is disabled on the RAM board. The RDOS EEPROM will be deactivated after the OS boots so the full 64k of RAM can be used. We need to figure out how that works so the deactivated addresses on the RAM board will work with the RDOS EPROM is deactivated. We have a pair of 50-pin connectors that are wire-wrapped together. These probably scramble the signals from the 16FDC so something besides a Persci diskette drive can be used.
3/18/22
Just a note, the backplane is a 9 slot W.J. Goudbout design for Vector Electronics with active termination.
With the Cromemco FDC-16 installed the front panel is inoperative. We put some Mylar tape on pins 20 and 70 if the 16FDC because those pins were re-designated as grounds on newer boards and are Memory Unprotect and Memory Protect on the IMSAI front panel. Putting Kapton tape over the fingers for pins 20 & 70 lets the front panel work again.
Unfortunately bit 12 on the front panel is stuck on, so we can't look at address 0xC000 on the floppy controller to see if the RDOS ROM is there. We reseated all of the boards and now bit 12 is working correctly. We checked the read/write capability of the Memory Merchants 64k static RAM board. All of the RAM addresses are working except for the 4k range 0xC000-0xCFFF. That will leave room for the RDOS ROM on the floppy controller board.
With the first 16FDC floppy controller board installed we can't see the RDOS ROM at 0xC000. All of the configuration DIP switches on the 16FDC are off, so the RDOS ROM should be visible. Using an oscilloscope we traced the signals to and from IC47, the 74LS30 address decoder, and it is correctly decoding the addresses in the 0xC000-0xCFFF range as ROM addresses. On the 16FDC's internal data bus, on the D input pins of IC51 a 74LS373 transparent latch, we can see ROM data that changes every time we do an Examine Next. The ROM data is not going through IC51, the 74L373, to the S100 bus. We tried the second 16FDC and it has address decoder issues. We swapped IC51 between the two 16FDC boards and there was no difference in the behavior of the first 16FDC. We will look for some 74LS373 chips during the week.
3/25/23
We looked at the address decoding issue on 16FDC controller #2. It is a different PCB revision level than 16FDC #1. The address decoder logic on 16FDC #2 uses a 74S133 NAND gate instead of a 74LS30 that is used on 16FDC #1. The address decoder output of 16FDC #1 is on the 74S133 is on pin 9, and is decoding the 0xC000 base address for the boot ROM. We got really confused by the behavior of the enable signals for IC51 a 74LS373 that drives the data bus. It looks like the chip is getting disabled when it should be getting enabled.
The electrolytic capacitor C53 on the -18VDC input to the 16FDC #2 decided to let the magic smoke out. It was really stinky. We replaced it with a modern electrolytic.
3/29/23
We should try the 16FDC boards in one of the Altairs to determine of the problem with reading the RDOS ROM is on the Cromemco ZPU board, or on the Cromemco 16FDC board.
Notes:
Memory Read:
The processor puts the address on A0-A15
The processor asserts sMEMR
The processor asserts pDBIN
If the memory cannot respond immediately it asserts the pRDY signal
The data is strobed when pDBIN goes low.
S-100 signal names preceded by a "p" are processor command/control, and those preceded by a "s" are processor status.
pHLDA 26 The processor will drive the address and data to high impedance
sMI 44 The current bus cycle is a fetch for the first byte of an instruction
sOUT 45 The address bus contains an output device address, and when pWR is active the databus will contain data
sINP 46 The address bus contains an input device address
sMEMR 47 The databus will carry memory read data
pRDY 72 If pulled low the processor will enter the wait state
pINT# 74 Interrupt request
pSYNC 76 Indicates the beginning of a machine cycle
pWR# 77 Memory or output data is valid on the data bus
pDBIN 78 The databus is in input mode
POC 99 Power On Clear
sINTA 96 Interrupt acknowledge
sWO# 97 The current bus cycle is write memory or output
To Do:
Investigate isolating contacts 70 and 20 from the S100 bus so the Cromemco 16FDC will work with the IMSAI front panel. (Done 3/18/23, Isolating the contacts lets the front panel work)
Reform the capacitors in the power supplies. (Done 8/18/21)
Remove all of the boards from the system and measure the power supply output. (Done 8/18/21)
Clean the card edge connectors in the backplane and the finger edge connectors on all of the boards. (Done 9/4/21)
If the power supply output is OK, reinstall the boards and see if there is any life in the system. (Done 8/18/21)
Rewire the serial cables with card edge connectors and crimp on DB-25 connectors and ribbon cables.
Replace the 2x 4k SRAM boards with boards totaling about 64k. (Done. FOund a 64k Memory Merchants Static RAM board that works)
Find 3x replacement blue paddles for the front panel. (9/22/21 replaced with new black paddles from Digikey, Received donated NOS red switches)
Add a diskette controller and 2x 8" diskette drives, and see if we can get CP/M running. (Trying a Cromemco 16FDC)
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