Embedded Files
3/29/25
The system booted ADSS and ran OK.
We tried the repaired DECtape drive that is above the console. The motor drive is working OK, but it is getting lots of errors when reading tapes. This needs more testing.
9/17/25
After the system was booted, some ADSS commands could not be entered due to garbled data. The VT-220 terminal used as the serial interface was verified with a loop-back test. An ASR-33 Teletype was used for input and exhibited the same behavior.
To investigate, the D-BS-KD09-A-11 Teletype Control (Sheet 1) schematic was referenced. Walking the serial signal path through the PDP-9 using an oscilloscope, TT KBD IN# was verified at the S107 Flipchip C33 Pin S. The signal was confirmed to have a start bit, 7 data bits, MARK parity (1) and 2 stop bits (correct for the terminal settings). For simplicity, a CTRL-A character (which is the character value 001 in octal) was issued, then CTRL-B (002), etc. Next, the signal and its complement were verified as inputs to the TTI shift register at the S202 Flipchip B34 pins E and L.
The TT KBD IN (B) signal was verified going into the the TT IN ACT flip-flop S202 B38 Pin V.
The TT IN ACT flip-flop was confirmed to change state (roughly) coincident with TT KBD IN.
The TT IN ACT output enables the clock of the R450 Flipchip C40, thereby resetting its phase to match the incoming serial signal. Ten clock pulses were observed (which will turn out to be significant). The corresponding output of the Pulse Amplifier from the R450 C40 Pin E was also confirmed to have the corresponding 10 pulses, each pulse width going to GND (logic 1) for about 200ns. That length of time was later learned to be about half as long as it should have been according to the PDP-9 Maintenance Manual, but this was not related to any problem.
The TTI shift register (TTI0 - TTI7) is comprised of a cascaded chain of S202 flip-flops, with an adjacent pair in each of the S202 flip-chip boards B34, B35, B36 and B37. The data was confirmed to shift properly along all of the register stages. A bit of a tangent was that the signal on TTI7 pin S was found to be weak. The wave shape was square at baud rate time scale, but the voltage attained was about half the expected height. Flip-chips B35 and B37 were swapped to see if this was a driver or overload problem. But after the swap, the problem entirely disappeared. The boards were then switched back, and still the problem was no longer present. Presumably there was a bad connection or possibly a problem with an oscilloscope probe (which were a bit flaky throughout).
Regrouping from the dead end, the lights of the front panel were selected to show the TTI register and control characters were again sent. After trying many different characters a pattern was noted that the faulty data was consistent with an extra shift of the serial shift register. Every two adjacent character codes read the same on the TTI register. The expected data/parity bits showed up shifted one to the right in the right-most seven bits. For example, capital A (301 Octal) showed up as 011 100 000, so did B (302 Octal) and C (303 Octal) appeared as 011 000 001.
We reviewed section 3.9.1.1 Keyboard Control in the PDP-9 Maintenance Manual. This section states that the ninth TTI LOAD pulse disables subsequent TTI LOAD pulses. After more review of the operation of the IN LAST UNIT and TT IN ACT flip-flop functions, it was found that a tenth TTI LOAD clock was occurring, despite the IN LAST UNIT signal at S202 C40 Pin M seen to change state after nine pulses. This should have inhibited further clocks, so only nine TTI LOAD clock pulses should have been allowed. So the DCD gate in Flipchip R450 C40 was in question. That last pulse should not have passed through, and that is what caused the extra shift of the TTI register.
The R450 Flipchip in C40 was removed. All of the diodes were checked for correct voltage drop, and diode D7 was found to be open circuit. This diode is part of a voltage regulation circuit that provides bias voltages for other parts of the circuit. After this diode was replaced with a new D-662 device, the flip-chip was reinstalled in the PDP-9. After that point, the serial communications worked properly. And nine pulses were confirmed with the oscilloscope for good measure.
10/2/25
We disassembled the system and packed it for shipment to the new RICM Lab space at 1051 Ten Rod Road in North Kingstown.
12/6/25
We moved the PDP-9 into the new RICM Lab space. We need to do some AC power work before we can see if the processor works.
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